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Analog to Digital Inverters - Coursework Example

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"Analog to Digital Inverters" paper contains a summary theory of some electronic devices and systems, including the Analogue to Digital Converter (ADC) and R-2R ladder Digital to Analogue circuit. The report also gives step by step procedure of simulating the designs using the OrCAD software. …
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ANALOG TO DIGITAL INVERTERS By The report contains a summary theory of some electronic devices and systems, including the Analogue to Digital Converter (ADC) and R-2R ladder Digital to Analogue circuit. The report also gives step by step procedure of simulating the designs using the OrCAD software and also implementing the actual design on the circuit board. Introduction Analogue to Digital converters (ADC) are electronically integrated circuit that transforms a signal from analog (continuous) to digital (discrete) form. Analog signals are characterized by directly measurable quantities while digital signals; on the other hand, have only two binary states, that is zeros state (0) and one state (1). Analog to Digital converters are used in the entire electronic world. Computer microprocessors only perform sophisticated processing on digitized signals. When a signal is in the digital form, it is less susceptible to the deleterious effects of additive noise. Analog to Digital Convertors provides a link between the analog world of transducers and the digital world of signal processing and data handling. Analog to Digital converters are primarily applicable in all fields and areas where an analog signal need to be processed, stored or transported into a digital signal. Some typical examples of Analog to Digital Convertor usage are the digital voltmeters, thermocouples, cell phone and digital oscilloscopes. Most microcontrollers use 8, 10, 12 or 16 Analog to Digital Convertors. Mathematical relationships are conveniently used to shows how the number of bits an Analog to Digital Convertor handles determines its particular theoretical resolution: An n-bit Analog to Digital Convertor has a resolution of one part in 2^n. Example, a 12-bit Analog to Digital Convertor has a resolution of one part in 4,096, where 2^12= 4,096. This means that a 12-bit Analog to Digital Convertor with a maximum input voltage of 10 VDC can resolve the measurement into 10VDC/4096. This amounts to 0.00244 VDC, equivalent to 2.44 mV. For the same range of 0 to 10 VDC, a 16-bit Analog to Digital Convertor resolution is 10/216 amounting to 10/65,536. The figure is equivalent 0.153mV. The resolution is usually specified with respect to the full-range reading of the ADC, and not with regards to the measured value at any particular instant (Sunter & Nagi, 1997). Fig 1. ADC converter block diagram A successive-approximation converter comprises of a Digital to Analog Convertor (DAC), a comparator (single) and registers and control logic. When the analog voltage to be determined is available at the comparators input, the control system logic initially sets all the bits to zero. Then the Digital to Analog Convertor’s most significant bit, often abbreviated as MSB is set to 1, which forces the Digital to Analog Convertor output to half of full scale. The comparator after which compares the analog output of the Digital to Analog Convertor to the input signal, and if the Digital to Analog Convertor output is lower than the input signal, the Most Significant Bit remains set at 1. If the Digital to Analog Convertor output is higher than the input signal, the Most Significant Bit eventually resets to zero. Next, the second Most Significant Bit with a weight of a quarter of full scale turns on and pushes the output of the Digital to Analog Convertor to either three quarter full scale or quarter full scale. This however will depend on whether the MSB remained at 1 or reset at zero. The comparator compares the Digital to Analog Convertor output to the input signal and the second bit either remains on if the Digital to Analog Convertor output is lower than the input signal or resets to zero if the Digital to Analog Convertor output is higher than the input signal. The third Most Significant Bit is then compared the same way and the process continues in order of decreasing bit weight until the Least Significant Bit is compared. Finally, the output register contains the digital code representing the analog input signal. Successive approximation stands the advantage of high-speed capability and reliability. The successive approximation also has medium accuracy compared to other Analog to Digital Converters types. A good tradeoff between cost and speed Capable of outputting the binary number in serial (on format is also an advantage of Successive approximation ADC. Successive approximation Analog to Digital Convertors is relatively slow since the comparisons go serially, and the Analog to Digital Convertor pauses at each step to set the Digital to Analog Convertor and waits for its output to settle. However, conversion rates reach over 1 MHz quickly. Also, a 12 and a 16-bit successive approximation Analog to Digital Convertors are relatively inexpensive; thus they are widely used in many PC-based data acquisition systems (Sunter & Nagi, 1997). Voltage-to-frequency Analog to Digital Convertors converts an analog input voltage to a pulse train. The frequency must thus be in proportional to the amplitude of the input. The pulses are counted over a period (must be fixed) so as to determine the frequency, and the pulse output pulse, in turn, represents the digital voltage. Voltage-to-frequency converters natively have a high noise rejection characteristic, since the input signal is incorporated over the counting interval. Voltage-to-frequency conversion is mostly used to convert slow and noisy signals. Voltage-to-frequency Analog to Digital Convertors is also primarily used for remote sensing in environments that are noisy. The input voltage is changed to a frequency at the remote location, and the digital pulse series is transmitted over a pair of transmission lines to the counter. This gets rid of the noise that can be introduced on the transmission lines of an analog signal over a relatively long distance. Procedure 1 Design and simulation of an 8 –bit successive approximation ADC converter During the design of an 8 –bit successive approximation ADC converter, selection of the right architecture is a paramount decision. Sigma Delta Analog to Digital Convertors architectures’ is useful for lower sampling rate and higher resolution which range approximately between 12bits to 24 bits. The primary applications for this Analog to Digital Convertors architecture are found in audio, voice band, and industrial measurements. The Successive Approximation, commonly referred to as SAR architecture is suitable for data acquisition. The architecture has a resolution ranging from between 8bits to 18 bits. Sampling rates range from 50 KHz to 50 MHz The most implicit way to create a Giga rate application with a range of 8 bit to 16-bit resolution is the pipeline Analog to Digital Convertor architecture. The successive approximation architecture majorly uses the binary search algorithm. The design consists of fewer blocks, example, one comparator, one Digital to Analog Converter and single control logic. The successive approximation Analog to Digital Converter consists majorly of 3 blocks namely comparator, successive approximation register, often abbreviated as SAR, and a Digital to Analog Converter. The current SAR Analog to Digital Converter builds using Capacitor Array, Digital to Analog Converter and Comparator Control logic blocks. Design of a capacitor array Digital to Analog Converters The conventional binary weighted capacitor array has weakness for higher resolution as a result of the larger capacitor ratio from Most Significance Bit capacitor to Least Significant Bit capacitor. To curb this problem, one technique is applied and is known as the split capacitor technique. For instance, to achieve the 8bits resolution, the capacitor array should be splinted as shown in the figure below The attenuation capacitor divides the Least Significant Bit capacitor array and Most Significant Bit capacitor array. Here, the ratio between Least Significant Bit to Most Significant Bit capacitor drops drastically compared to the conventional binary weighted capacitor. Operation for binary weighted capacitor array ADC The capacitor array operates in four different phases which include Discharge phase, Sample phase, Charge transfer (Hold) phase and Charge redistribution phase. During the discharge period, comparator act in unity gain buffer and the reset switch is always on. All the bottom plates of capacitor array are linked to the VCM. During sampling phase, base plates of capacitor array are connected toVin (Input voltage). The reset button still on hence the topmost plate is on VCM, and the voltage across capacitor array is Vin-VCM. At the Charge transfer phase, bottom plates of capacitor array are switched to VCM, and top plates are floating. In this phase, the reset button is off. Hence, Voltage most at top plate Vx, which is given by Vx= VCM - (Vin-VCM) = -Vin. During the Charge redistribution phase, first the Most Significant Bit is set to high, and the bottom plate of Most Significant Bit capacitor is connected to Vref (reference voltage). The other remaining bits are set to zero; hence base plates of these capacitors are connected to Vref (Reference voltage Negative) (In this case GND). If the comparator output is high, the MSB reset to top and bottom plate of MSB capacitor remains connected to V ref. If Comparator output is low, the bottom most plate of Most Significant Bit is then connected back to the ground. The voltage at the upper section of the capacitor array given by Vx is: Vx = -Vin + Vos + D N-1 * (Vref/2) = 0.3 + Vos+ 1*(1/2)* 1 =0.8 V Experiment procedures were done referring to the different internal blocks circuits from various works of literature, articles and online materials and the applied the concepts to the circuits. The next phase involved mathematical calculations that were done manually. The schematic capture was done using the OrCAD Composer Tool. The next task involved simulating the design at the circuit level and integrating all the circuits checking their functionality. The other primary task was to measure and determine the performance evaluation. The performance parameters were the vital part of any design to satisfy the design specification. There are two types of the setting of Analog to Digital Converters; static and dynamic. The static parameters include the offset error, gain error, Integral Nonlinearity (INL), and Differential Nonlinearity (DNL). The dynamic parameters included the signal to noise ratio (SNR), Effective Number of Bits (ENOB), and the Total harmonic distortion (THD) (Sunter & Nagi, 1997). Statistic parameters Offset errors are defined as the difference between the actual input value and theoretical value of input voltage that is required to obtain the transition from first binary code 00...000 to the next binary code 00...001.Gain error is explained as the ratio of the difference between actual maximum input voltage and actual minimum input voltage to the difference between the theoretical maximum input voltage and the theoretical minimum input voltage. Integral Nonlinearity (INL) is the difference between the data converter code transition points and straight line with all other error set to zero. Differential Nonlinearity can be defined as the difference between the actual code width of a non-ideal converter and the ideal case. Dynamic parameters Signal to Noise Ratio abbreviated as SNR is defined as the ratio of the highest RMS value (Root Mean Square) input signal to the RMS value of the noise. Valid numbers of bits (ENOB) specifies the dynamic performance of an ADC at a particular input frequency and sampling rate. The Total harmonic distortion (THD) is termed as the ratio of the RMS sum of the harmonics that are selected for the input signal to the fundamental frequency itself. Resources utilized During the design and simulation process, both Microsoft Excel and Cadence tools are used. For the design implementation, Cadence Composer tool is used. The next step involved simulating the model using the OrCAD Simulator, and the performance parameters were checked Design and simulation of an R-2R ladder Digital to Analogue circuit The design and simulation of the DAC involved a series of steps. Creating a project The first step in any design always involves creating a project in OrCAD. 1. A new folder was created in Windows to hold all files for the project. On the window, My Documents option was selected, a new folder was created for this course, and then a folder within this folder was also created for each design. 2. The options File > New > Project was selected from the menu bar of Capture. 3. In the New Project dialog box: 4. Analog or Mixed A/D project was selected. 5. The Browse key was clicked 6. The H drive was selected and navigated to the new directory that had been created for this design 7. Create a blank project button was selected in the small dialog box that appeared 8. The project had now been created 9. The Design Resources folder in the project were expanded Simulating the circuit The simulation profile was set up to make an AC Sweep of the circuit range from the frequency 10Hz to 100 kHz. The simulation was then run. The V button on the capture was clicked to Enable Bias Voltage Display. The voltage gain was then plotted in Decibels following the steps below. 1. A param block from the special library was placed on the schematic. 2. The Property Editor for the param block was opened. 3. Add arrow option was selected, naming the parameter with a certain name. 4. The parameter did not appear on the schematic by default, so the newly added row/column was selected in the spreadsheet. 5. The value of C2 was changed from a fixed value to the parameter. 6. A new simulation profile was created with same frequency sweep plus a parametric sweep on Cap2from 0.1μF – 1000μF. Preparation for PCB layout When the design of the circuit had been finalized, it was laid out on a printed circuit board (PCB) Procedure 2 Designing, testing and analysis of an 8-bit ADC controller integrated with a microcontroller that displays the digital output of temperature sensor A type TC913A auto-zeroed amplifier was chosen to be used in place of the amplifier. This selection of the amplifier was preferred since it contains a very low supply voltage (Voss) of close to 15 mV (although sometimes it varies giving an allowance of +/- 0.5mv) and high CMRR of116 dB. In the implementation of the design, several other thermocouple amplifiers were characterized as suitable due to their desirable VOS and their CMRR specifications. Among these amplifiers are the Auto-zero amplifiers, chopper amplifier and the instrumentation amplifiers. During the design implementation, all the inputs of the thermocouple are fixed to a positive and negative supply and passed through a total resistance of 10 MΩr. The purpose of this is to ensure that the circuit will detect any failed open connection in the open circuit of the thermocouple. The gain of the amplifier was set to be 249 so that it could provide a provided a temperature coefficient of 10 mV/°C. Test of the design The function of the microcontroller was to compute the actual temperature by carrying out some arithmetic operations (subtracting the cold junction temperature from the temperature determined by the thermocouple amp). Measurement of the cold junction temperature was done using a selected Silicon Integrated Circuit analog output sensor (TC1047A) located on the Printed Circuit Board. The actual cold junction was seen where the wires in the thermocouple meet the copper wires. The copper wires are located at a connector. Placing the adjacent Silicon Integrated Circuit analog output sensor to the connector minimizes the cold junction error that is brought about by placing the temperature sensor on the Printed Circuit Board. The voltage output of the Silicon Integrated Circuit analog output sensor is listed as: VOUT= [(Temp. (°C)) x (10 mV/°C)] + 500 mV. The Silicon Integrated Circuit analog output sensor provided a voltage output of 10 mV/°C having an offset of 500 mV. The thermocouple amplifier accuracy and cold junction circuits were estimated to be nearly to ±5.4°C by using the root-squared-sum equation method. The common mode voltage noise signal getting through to the circuit from the thermocouple leads was estimated to be close to 10V. Avery tight tolerance resistor was used for the differential amplifier in order to achieve a high Common Mode Rejection Ratio of .0.1% Resistors that were in use were chosen for the range R3 through R6. The analysis clearly showed that most of the measurement errors were due to the error arising from the cold junction compensation. Results and observations The step size resolutions of the converters were calculated using the formula below ! v=v/2^n where the parameters: !v=resolution V=reference voltage range 2^n=number of States Substituting with the actual values, we get that the resolution is: !v= (10*10^-3)/2^3 The resultant resolution is 1.25*10^-3 An Analog to Digital Converter was found to detect a smallest voltage change of 2.3v when a varying input of 0-5 volts was applied to the input. From the results obtained above, the SAR Analog to Digital Converter was noted to have a resolution ranging from 8 to 16 bits with sampling rate few kSPS to few MSPS. A current SAR Analog to Digital Converter was noted to have a resolution of 8 bits and sampling rate more than 50 MSPS. The current SAR Analog to Digital Converter thus is more useful for high speed with medium resolution applications. In theory, the continuous analog signal can be broken into an infinite number of digital steps, but the quantization of an analog signal by the ADC can be done only in the finite number of steps that can be produced by the ADC. The quantization error is the error introduced because of the process of quantization. Ideally any analog input voltage can be a maximum of 1/2 LSB away from its nearest digital code. So the quantization error is 0.5LSB for the ADC. Monotonicity is defined as a property of the ADC transfer function, which ensures that converted digital values will never decrease if the analog input does not decrease and conversion results will never increase if the analog input does not increase. This property is inherent to the design of the ADC, subject to the accuracy specified in the datasheet in each case ADCs that can accept only positive input voltage are known as unipolar. ADCs embedded in microcontrollers are unipolar, as the input cannot decrease below the analog ground.ST7 microcontrollers have unipolar input ADCs and have an input range from 0V to VAREF. To improve Analog to Digital Converter accuracy, you can perform a number of ADC conversions and use the average of these conversions to obtain the more accurate digital output. In hardware averaging ADCs, this technique is embedded in the hardware and the averaging is done by the hardware itself (Sunter & Nagi, 1997). The final digital output received from ADC is the average of the conversions. This hardware averaging technique is implemented in some ST7 microcontrollers. The conversion time is thus increased as several conversions are performed The sampling theorem states that to convert the analog signal with frequency ‘f’, the ADC sampling frequency must be at least twice the analog signal frequency. This means that the sampling rate ought to be at least ‘2*f’. Sampling the signal at twice the analog signal frequency will not result in a loss of information. If the sampling frequency is less, then the information will automatically be lost. This is a standard theorem that applies to ADCs in general. Example an Analog to Digital Converter with a conversion time of 10μs can be used to sample an analog signal with a period of 20μs, i.e. 50 kHz. (1/20μs). The output of the sensor is selected from the available microcontroller hardware and software resources, in addition to the complexity of the sensor circuit. The sensor output can consist of an analog, frequency, ramp rate, duty cycle, serial or logic format that is proportional to temperature. Temperature measurement is an attractive topic, and the designer should review the literature to evaluate the many sensor and circuit options available. A designer must evaluate the trade-offs of the sensor, conditioning circuitry, and sensor output in order to maximize the measurement accuracy while easing the interface to the microcontroller. In addition, the designer must consider system integration issues such as the location of the sensor, grounding, EMI/ESD protection and shielding in order to provide a robust temperature measurement. A sample of practical circuits and interface techniques has been presented along with design equations. The following sensor guidelines can be used as a starting point to select a temperature sensor. If the application requires a high-temperature measurement, thermocouples are a good choice because of their wide temperature operating range. Conclusion As observed in the introduction, an SAR Analog to Digital Converter is more appropriable for medium resolution with high speed ranging from little kSPSs to large MSPSs. Analog to Digital Converter using capacitor array Digital to Analog Converter is marketable and more cost-effective. Furthermore, the SAR Analog to Digital Converter has many applications such as wireless communication, medical Instruments among others. Thermocouples are typically used as remote sensors and, therefore, the circuit must provide noise immunity by using good grounding and shielding methods. If your application requires precision, RTDs set the standard with their superior repeatability and stability characteristics. For applications such as the temperature measurement on a PCB, either thermistors or silicon IC sensors should be considered. Thermistors are available in more packages, are lower in cost and have a faster thermal response time than silicon sensors. However, thermistors require additional signal-conditioning circuitry while silicon sensors provide both the sensor and circuitry on a single IC that can be interfaced directly to the microcontroller. References Sunter, S. K., & Nagi, N. (1997). A simplified polynomial-fitting algorithm for DAC and ADC BIST. Pg. 389-395 Read More
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